FPGA board maintenance tips sharing (3.3V and 1.2V short circuits)

Recently in the maintenance of some FPGA board (EP4CE30F23C8N), found that a dozen FPGA board 3.3V and 1.2V have appeared a short circuit to ground, remove some of the external 3.3V power supply chip, still short circuit, no way to finally a direct Since the FPGA chip was disassembled, the short-circuit phenomenon disappeared. The original 3.3V and 1.2V breakdown of the FPGA was short-circuited.

Further look up the reasons, determine which FPGA's bank power supply has a short circuit, measured several FPGA chips continuously, and found that all Bank5 problems;

After further investigation, why does Bank 5 have a problem? There is an internal cause. Guess it should be an abnormality in some signals of the Bank that caused the Bank to be broken down.

FPGA board maintenance tips sharing (3.3V and 1.2V short circuits)

In order to confirm this assumption, measuring the impedance of the relevant signal of Bank5 to ground actually verified the previous hypothesis. The impedances of the two signal lines connected to I2C have abnormalities in different degrees. (The normal board is infinite and there is a problem. The board-connected FPGA I2C signal lines have impedances of only a few Euros to several hundred Euros . It seems that the I2C signal has caused an impact on the pins of the FPGA and caused the FPGA power to be broken down. (The FPGA is still very fragile.) Be careful, hehe).

For this maintenance work, we also made a summary of the debugging and maintenance of the FPGA system.

The FPGA system is working abnormally. There are two common situations:

1, FPGA power configuration is unsuccessful;

2. Although the power-on configuration of the FPGA is successful, it is not working properly.

In either case, first of all, you should first check whether the power supply system and the crystal oscillator are working properly. After confirming that they are all correct, you can continue to search for problems.

For the first case, you can usually locate the configuration circuit in the FPGA: 1. Confirm that the configuration mode is selected correctly; 2. Configure whether the impedance of the relevant signal line is normal. These signal lines are : Config_done , nConfig, nCE, nSTATUS, nCS, ASDO , DCLK, DATA, where measuring the impedance of the Config_done signal to ground makes it easier to determine where the configuration circuit is (personally thought). Under normal conditions, the impedance of Config_done to ground should be at least a few thousand Euros (where the impedance is about 11K ohms or so). If the impedance is measured to be less than 1K, it is basically certain that the configuration circuit has a problem.

For the second case, removing the power supply problem is generally a problem with the crystal oscillator. If the above measures still do not effectively find and solve the problem, you can further confirm whether the hardware connection and software settings of the global signal line of the FPGA are correct, such as: DEV_OE , DEV_CLRn .

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