Read the high resistance state and three-state gate principle

High-resistance state This is a common term in digital circuits. It refers to an output state of a circuit that is neither high nor low. If the high-impedance state is input to the next-level circuit, there is no lower-level circuit. Any influence, like the one that is not connected, if it is measured with a multimeter, it may be a high level or a low level, and it is determined by what is followed by it.

The essence of high-impedance state: high impedance state in circuit analysis can be used as an open circuit understanding. You can think of it as an output (input) with very large resistance. His limits can be considered to be suspended. In other words, the theoretical high-impedance state is not floating, it is a state of great resistance to ground or to the power supply. The actual application is almost the same as the floating of the pins.

The meaning of high resistance state: when the output pull-up tube of the gate circuit is turned on and the pull-down tube is turned off, the output is high level; otherwise, it is low level; when the pull tube and the pull-down tube are both cut off, the output end is equivalent to floating Empty (no current flows), its level depends on the level of the external level, that is, the gate circuit gives up control of the output circuit.

typical application:

1. On the structure of the bus connection. Multiple devices are attached to the bus, and the devices are connected in a high-impedance manner on the bus. This automatically releases the bus when the device does not occupy the bus, so that other devices can obtain the right to use the bus.

2, most of the microcontroller I / O can be set to high-impedance input, such as Lingyang, AVR and so on. The high-impedance input can be considered that the input resistance is infinite. It is considered that the I/O has little influence on the front stage, and does not generate current (no attenuation), and also increases the chip's resistance to voltage shock to a certain extent.

A commonly used representation of high-impedance states: the high-resistance state is often represented by the letter Z.

Tri-state gate

Figure 1 Three-state gate logic symbol

The tri-state gate means that the output of the logic gate has a high- and low-level state, and a third state, a high-resistance gate. The high-impedance state is equivalent to the blocking state (the resistance is large, equivalent to an open circuit). The tri-state gate has an EN control enable to control the continuity of the gate. Devices that can have these three states are called tristates (gates, buses, ...).

The computer uses 1 and 0 to indicate yes, not two logics. However, sometimes this is not enough. For example, he is not rich enough, but he is not necessarily poor; she is not beautiful, but not necessarily ugly. In the middle of these two extremes, it is expressed as an intermediate state that is neither + nor "," called high impedance. High level, low level can be pulled up and pulled low by the internal circuit. In the high-impedance state, the pin-to-ground resistance is infinite, and the true level value can be read when the pin level is read. One of the important functions of the high-impedance state is that the I/O (input/output) port is read into the external level at the time of input.

The high impedance state is equivalent to the state in which the gate and its connected circuit are disconnected. (Because you can't disconnect it in the actual circuit, set such a state to make it disconnected). A tri-state gate is an output stage that extends the logic function and is also a control switch. Mainly for the bus connection, because the bus only allows only one user at a time. Typically, multiple devices are connected to the data bus, and each device is gated by a signal such as OE/CE. If the device is not strobed, it is in a high-impedance state, which is equivalent to not being connected to the bus and does not affect the operation of other devices.

If your device port is to be hung on a bus, you must pass a tri-state buffer. Because only one port can be output at the same time on one bus, other ports must be in a high-impedance state, and the data of this output port can be input at the same time. So you also need to have bus control management, which port to access, the port's tristate buffer can be transferred to the output state, which is a typical three-state gate application. If there are no more than two output devices on the line, of course, the tri-state gate is not used, and the line or logic is another matter.

Figure 2 Three-state gate constitutes a one-way bus